COE 202 Lectures

Digital Logic Design

Muhamed F. Mudawar

mudawar@kfupm.edu.sa

Office: Building 22, Room 328, Phone: 4642

COE 202 Home | Exercises | Tools

PowerPoint Presentations

Introduction to Digital Circuits

Binary Arithmetic

Boolean Algebra and Logic Gates

The Karnaugh Map

Characteristics of Logic Gates

Additional Gates

Introduction to Verilog

Combinational Circuit Design

Arithmetic Circuits

Arithmetic Circuits 2

Arithmetic Circuits 3

Functional Blocks

Behavioral Modeling in Verilog

Introduction to Sequential Circuits

Analysis of Clocked Sequential Circuits

Sequential Circuit Design

Modeling Sequential Circuits in Verilog

Registers and Counters

PDF Files